CPU-Z Report
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CPU-Z version 1.22.
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| Name | AMD Duron |
| Code Name | Applebred |
| Specification | AMD Duron(tm) Processor |
| Family / Model / Stepping | 6 8 0 |
| Extended Family / Model | 7 8 |
| Package | Socket A |
| Core Stepping | A0 |
| Technology | 0.13 µ |
| Supported Instructions Sets | MMX, Extended MMX, 3DNow!, Extended 3DNow! |
| CPU Clock Speed | 1460.4 MHz |
| Clock multiplier | x 11.0 |
| Front Side Bus Frequency | 132.8 MHz |
| Bus Speed | 265.5 MHz |
| L1 Data Cache | 64 KBytes, 2-way set associative, 64 Bytes line size |
| L1 Instruction Cache | 64 KBytes, 2-way set associative, 64 Bytes line size |
| L2 Cache | 64 KBytes, 16-way set associative, 64 Bytes line size |
| L2 Speed | 1460.4 MHz (Full) |
| L2 Location | On Chip |
| L2 Data Prefetch Logic | yes |
| L2 Bus Width | 64 bits |
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| Mainboard and chipset | |
| Motherboard manufacturer | ECS |
| Motherboard model | K7S5A, 1.0 |
| BIOS vendor | American Megatrends Inc. |
| BIOS revision | 07.00T |
| BIOS release date | 04/02/01 |
| Chipset | SiS 735 rev. 1 |
| Southbridge | SiS IDX rev. 0 |
| Sensor chip | IT 0 |
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| AGP Status | enabled, rev. 2.0 |
| AGP Data Transfert Rate | 4x |
| AGP Side Band Addressing | supported, enabled |
| AGP Aperture Size | 64 MBytes |
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| Memory | |
| DRAM Type | DDR-SDRAM |
| DRAM Size | 512 MBytes |
| CAS# Latency | 3.0 clocks |
| RAS# to CAS# | 3 clocks |
| RAS# Precharge | 4 clocks |
| Cycle Time (TRAS) | 6 clocks |
| Bank Cycle Time (TRC) | 10 clocks |
| # of memory modules | 2 |
| Module 0 | Dane-Elec DDR-SDRAM PC2100 - 256 MBytes |
| Module 1 | Nanya Technology DDR-SDRAM PC2000 - 256 MBytes |
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| Software | |
| Windows version | Microsoft Windows 2000 Workstation Service Pack 4 (Build 2195) |
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